Illustration by Rose Anderson.
Computational sprinting is a groundbreaking new approach to smartphone power and cooling that could give users dramatic, brief bursts of computing capability to improve current applications and make new ones possible.
Its developers at the University of Pennsylvania and U-M are pushing mobile chips beyond their sustainable operating limits, much like a sprinter who runs fast for a short distance. The researchers presented a paper on their concept Feb. 28 at the International Symposium on High Performance Computer Architecture in New Orleans.
“Normally, these devices are designed for sustained performance, so that they can run full bore forever. We’re proposing a computer system that can perform a giant surge of computation, but then gets tired and has time to rest,” says Thomas Wenisch, study co-author and an assistant professor at the Department of Electrical Engineering and Computer Science.
Under the computational sprinting scheme, up to 15 additional cores would fire up to work in parallel alongside the chip’s main core for up to one second. This could speed up the device’s response time 10-fold.
Other U-M researchers involved are Marios Papaefthymiou, chair of Computer Science and Engineering; Kevin Pipe, an associate professor in the departments of Mechanical Engineering, and Electrical Engineering and Computer Science; Yixin Luo, an undergraduate engineering student; and Anuj Chandawalla, a doctoral student in the Department of Electrical Engineering and Computer Science.
